1. Field of the Invention
The present invention concerns a synchronism error detection and correction system for a circulating memory. It may be used, in particular, in a telephone exchange employing time division switching for pulse code modulation signals.
2. Description of the Prior Art
At the inputs of such an exchange, the signals from the lines are sampled at 8 kHz and each sample is converted into a 8-bit coded combination. Each 8-bit combination is transmitted in parallel on eight conductors in a very short time interval constituting a time channel. It is thus possible to time multiplex 256 channels, for example. The recurring period of the successive time slots of a same channel is 125 .mu.s, whereas the duration of each time slot is approximately 500 ns. An incoming multiplex group thus routes the signals from 256 lines. A similar outgoing multiplex group thus routes the signals towards the same 256 lines. The above-mentioned numerical values, without being necessary, are nevertheless currently admitted.
Inside the exchange, it is necessary that a coded signal combination appearing in a channel time slot of a multiplex group be retransmitted in any channel time slot of any multiplex group. This entails space switching operations (connections from group to group) and time switching operations (connections from channel to channel). They will be carried out by means of a network including space switches and stores. This network may be, for example, of the well-known space-time-space type. A connection path between an incoming channel of a first line and an outgoing channel of a second line uses two space switches, arranged, in a way, on each side of a memory cell; they give it access respectively to the incoming multiplex groups and to the outgoing multiplex groups. In this way, at the time slot assigned to the incoming channel and through the first switch oriented onto the appropriate incoming group, a coded combination originated from the incoming channel is stored in the memory cell. At the time assigned to the outgoing channel and through the second switch oriented onto the appropriate outgoing group, the coded combination originated from the incoming channel and stored in the memory cell is retransmitted on the outgoing channel. The connection in the opposite direction between the outgoing channel of the first line and the incoming channel of the second line, is carried out in the same way and uses generally the same memory cell.
In practice, the necessary numerous memory cells are memory cells belonging to several speech stores and two space switches are associated with each store, an incoming group switch and an outgoing group switch. In a speech store, at each time slot, a memory cell is addressed in order to be the object first of a read operation and then of a write operation, according to the just described switching system. At the same time, the incoming group switch and the outgoing group switch must receive a group address in order to take the appropriate orientation.
Thus, there has been provided a path store associated with each speech store and its relevant switches, which will supply, at each time slot, the necessary addresses, that is an address for the speech store and an address for the switches. This path store has 256 cells, one per time slot, which are cyclically read-out in synchronism with the multiplex group time slots.
As in the total cost of such an exchange, the stores are a substantial part of it, the most economical stores are being used, as far as it is possible. At present, the most economical stores are the circulating memories of the MOS type. The basic element of these memories is a shift register which may have 256 stages and thus memorize 256 bits, one per time slot in the concerned application. By juxtaposing n of these registers, a circulating memory is obtained which can memorize 256 words of n bits and be used as a path store. Normally, the output of this circulating memory is connected to its input and the 256 words it contains cyclically circulate in response to pulses corresponding to each time slot; these words are one by one available, at each time slot, when they transit between the output and the input of the path store, in order to supply the addresses to the speech store and to its switches. It is also at that time that a path may be replaced by another one by inhibiting the output of the circulating memory and by replacing the path word it supplies by another path word supplied by the switching center control units.
In order to identify the path words stored in such a circulating memory, a 256-position counter is associated with it. This counter steps once at each clock pulse while the words contained in the circulating memory are shifted by one step. It supplies a binary combination identifying, at once, each time slot and the path word supplied at that time by the circulating memory. This counter may be easily readjusted at each multiplex cycle; the clock delivers not only a stepping pulse at each time slot but also a readjustment pulse with the 256th stepping pulse. This readjustment resets the counter whatever its position.
The practical drawback of such circulating memories relates to the fact that there may occur a lack of synchronism between the circulating memory and its counter. Indeed, a spurious pulse may, for example, cause an untimely shift in the registers of the circulating memory. The address information supplied by the latter will then result erroneously as they will not be supplied at the appropriate times and nothing will enable the detection of the anomaly and therefore its correction. The associated counter may be concerned or not by this spurious pulse. Anyway, the counter will be readjusted at the end of the multiplex cycle and will be anew in synchronism whereas the memory will remain shifted.
In the above-described switching center, such a synchronism failure in a path store will affect all the calls transmitted via this store. This cannot be accepted.